With the development of the thin film transistor technology, the display technology based on low-temperature polycrystalline silicon gradually becomes a mainstream. FIG. 1 shows a typical pixel unit including a low-temperature polycrystalline silicon thin film transistor. The process of forming the pixel unit as shown in FIG. 1 includes the following steps: forming a buffer layer 40 on a substrate 70; forming an active layer 12 made of a low-temperature polycrystalline silicon material; forming a gate insulating layer 50; forming a gate (including a first gate 14 and a second gate 15); forming an interlayer insulating layer 55; forming a source via and a drain via; forming a source 11, a drain 13, a source via electrode 1 filling the source via and a drain via electrode 2 filling the drain via; forming a planarization layer 60; forming a planarization layer via; forming a common electrode 30 and a planarization layer via electrode 3 filling the planarization layer via; forming a passivation layer 80; forming a passivation layer via; and, forming pixel electrodes 20 and a passivation layer via electrode 4 filling the passivation layer via.
It can be seen that it is required to use masks 9-10 times for forming the pixel unit as shown in FIG. 1, and the process is relatively complicated. As a result, the manufacturing method of an array substrate including the pixel unit is complicated and high in cost.
Therefore, how to simplify a manufacturing method of an array substrate including a pixel unit becomes a technical problem to be solved in the art.